1. Field of Invention
The present invention relates to a manufacturing method for forming a semiconductor device having a metal gate.
2. Description of Related Art
MOS is a basic structure widely applied to various semiconductor devices, such as memory devices, image sensors and display devices. An electric device is required to be made lighter, thinner and smaller. As the CMOS is continuously minimized, a logic CMOS technology is developed towards a technology having a high dielectric constant (high-k) dielectric layer and a metal gate. In order to provide a correct and adequate work function value for the interface between the metal gate and the gate dielectric layer, different work function metal layers for NMOS and PMOS devices are provided between the corresponding metal gates and high-k gate dielectric layers.
However, the work function metal layers are easy to have overhang at the gate trench openings, so that the gate trench openings are reduced, and thus, the metal filling layer can not be filled in successfully, or a seam may occur in the metal filling layer in the gate trenches. Therefore, the reliability of the devices is affected.